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Freescale Semiconductor /MKV56F24 /SIM /MISCTRL0

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Interpret as MISCTRL0

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (00)CMPWIN0SRC 0 (00)CMPWIN1SRC 0 (00)CMPWIN2SRC 0 (00)CMPWIN3SRC 0 (0)EWMINSRC 0 (00)DACTRIGSRC

CMPWIN0SRC=00, DACTRIGSRC=00, CMPWIN3SRC=00, EWMINSRC=0, CMPWIN1SRC=00, CMPWIN2SRC=00

Description

Miscellaneous Control Register 0

Fields

CMPWIN0SRC

CMP Sample/Window Input 0 Source

0 (00): XBARA output 16.

1 (01): CMP0 Sample/Window input is driven by both PDB0 and PDB1 pluse-out channel 0.

2 (10): PDB0 pluse-out channel 0.

3 (11): PDB1 pluse-out channel 0.
CMPWIN1SRC

CMP Sample/Window Input 1 Source

0 (00): XBARA output 17.

1 (01): CMP1 Sample/Window input is driven by both PDB0 and PDB1 pluse-out channel 1.

2 (10): PDB0 pluse-out channel 1.

3 (11): PDB1 pluse-out channel 1.
CMPWIN2SRC

CMP Sample/Window Input 2 Source

0 (00): XBARA output 18.

1 (01): CMP2 Sample/Window input is driven by both PDB0 and PDB1 pluse-out channel 2.

2 (10): PDB0 pluse-out channel 2.

3 (11): PDB1 pluse-out channel 2.
CMPWIN3SRC

CMP Sample/Window Input 3 Source

0 (00): XBARA output 19.

1 (01): CMP3 Sample/Window input is driven by both PDB0 and PDB1 pluse-out channel 3.

2 (10): PDB0 pluse-out channel 3.

3 (11): PDB1 pluse-out channel 3.
EWMINSRC

EWM_IN Source

0 (0): XBARA output 58.

1 (1): EWM_IN pin
DACTRIGSRC

DAC0 Hardware Trigger Input Source

0 (00): XBARA output 15.

1 (01): DAC0 can be triggered by both PDB0 interval trigger 0 and PDB1 interval trigger 0.

2 (10): PDB0 interval trigger 0

3 (11): PDB1 interval trigger 0

Links

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Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data